LINEAR TECHNOLOGY FEBRUARY 1992 IN THIS ISSUE . . . COVER ARTICLE The LT1158: Low Voltage, N-Channel Bridge Driver ... 1 Milton Wilcox Editor's Page ..................... 2 Richard Markell DESIGN FEATURES The LTC1096/1098: Micropower, SO-8 ADCs ..... 6 William Rempfer The LT1432: 5-Volt Regulator Achieves 90% Efficiency .. 12 Carl Nelson The LTC1156 Quad HighSide MOSFET Driver ........ 13 Tim Skovmand The LT1103/1105 Family of Offline Switching Regulators ........................................ 14 Anthony Bonte The LT1124/1125: What's New in Precision, High-speed Op Amps .......................... 18 Alexander Strong DESIGN IDEAS Introducing the LTC1292: 12-Bit, 8-Pin, Serial-I/O Data Acquisition System ......... 20 Sammy Lum DC-Accurate, Butterworth Lowpass Filter Requires No On-Board Clock ............... 22 Richard Markell New Device Cameos ......... 23 LTC Marketing VOLUME II NUMBER 1 The LT1158: Low Voltage, N-Channel Bridge Design Made Easy by Milton Wilcox Synchronous control of two N-channel power MOSFETs operating from 5V to 30V has just become considerably easier. The new LT1158 halfbridge driver effectively deals with the many problems and pitfalls encountered in the design of high efficiency motor control and switching-regulator circuits (see Table 1). This article will discuss these problems, along with the solutions afforded to the bridge designer by the LT1158. LT1158 Overview Figure 1 is a block diagram of the LT1158. A single input pin controls switching of both N-channel MOSFETs; all timing and protection functions are performed by the LT1158. Pulling the enable pin low actively holds both MOSFETs off and reduces supply current to 2mA. The output pins have been arranged for ease of PC board layout. Bipolar technology was chosen for operation to 30V (36V absolute maximum) due to its inherent junction breakdowns of greater than 60V. This is particularly important in an N-channel top-side driver, which must operate above the supply rail. Bipolar technology also provides consistent drive capability: the LT1158 switches 3000pF in 150ns, but at 10,000pF this only increases to 250ns, making operation to 50kHz possible with the largest MOSFETs. And, unlike CMOS drivers, these transition times are maintained over the entire supply range. Protection from over-current faults is essential in any high current system. The LT1158 protects the top MOSFET from shorts to ground, or shorts across the motor in a full-bridge circuit. The flexibility of the LT1158 protection circuitry allows the bridge designer high inrush current capability along with self protection and automatic reset in the event of a short. Life Above The Supply Rail The first problem designers face in N-channel half-bridge circuits is developing the top-side gate drive, which must swing at least 10V above the supply rail for standard MOSFETs (and must remain there for dc operation). This challenge alone is so demanding that designers often resort to more expensive and less efficient P-channel Table 1. Major pitfalls encountered in synchronous MOSFET driver designs * MOSFET gate-voltage overstress * Top-side drive starvation at high duty cycles * DC operation of N-channel top side MOSFET * Cross-conduction, or "shoot-through" currents * Output transients below ground and above supply * Protection against short circuits * Starting high in-rush current loads continued on page 3 DESIGN EDITOR'S FEATURES PAGE A Bunch of Guys with Funny Names Write About Elegant Integrated Circuits by Richard Markell With this issue we begin our second volume of the magazine Linear Technology. The first two issues were quite a learning experience both about the process of engineering and about the process of desktop publishing. As the issues and volumes roll along, more designers will become writers and, perhaps a few writers will become better engineers. This issue is the largest issue yet. The topics in this issue range from micropower A/D converters to offline switching regulators with a few switched capacitor filter applications also. This issue is heavily focused on power-control devices, ranging from the LT1158 half-bridge MOSFET driver to the 1103/1105 family of offline switching regulators and the LT1432 switching regulator controller. Power-control and power-supply ICs have been the focus of much attention at Linear Technology recently. Issue Highlights Milt Wilcox headlines this issue with his article on the LT1158 halfbridge MOSFET driver. This part is a significant addition to the new line of power control circuits that Milt is developing with his group. Milt has many years of experience designing RF and video circuits as well as consumer IC's. He holds more than 25 patents. Milt has been known to spend weekdays finessing the ultimate performance from a circuit design while spending the occasional weekend driving fast cars on an open track. Tony Bonte describes the architecture of his LT1103 offline switching regulator in his design feature. The 2 From the manufacturer's point of view, power ICs are a difficult topic. This is less a result of the difficulties of the integrated circuit design than of the host of peripheral parts that are generally required. The customer must not only design the application circuit, but must, in many cases, design the magnetics necessary to make the IC perform as specified. This is not the case with the ICs available from LTC. LTC offers power-control devices ranging from micropower DC-DC converters (the LT1073 family), to high-power, high-efficiency switching regulators (the LT1070/1170/1270 families), with a full selection of devices in between. In addition, every circuit published by LTC has specified magnetics complete with part numbers. The difficulties of power-supply design, though not insignificant, are significantly reduced by the availability of fully specified and tested magnetics. We at LTC endeavor to LT1103 is another major design achievement for Linear Technology. Tony has designed all flavors of linear integrated circuits in his eight-year career. His interests include tennis and making handcrafted bread. Can we get an engineering sample of the bread Tony? Carl Nelson describes the LT1432 switching regulator controller. This part allows 5 volt regulators to achieve 90% efficiency. Carl is employee number 11 and one of the founders of LTC. Carl wastes enormous amounts of time restoring his Victorian home. Alexander Strong describes the new low-noise operational amplifiers, the LT1124, 25, 26, and 27. These offer the user not only the IC, but fully specified and tested magnetics. This makes the use of the integrated circuit easier and allows significant cost savings by placing the power supply completely under the control of the equipment designer. We know that it is difficult to design power supplies and their required magnetics, so we provide whatever kind of support is required. We have in-house magnetics-design expertise and we are developing software to assist in the design of switching power supplies. We are here to help. This issue will be mailed to the subscription list which we collected from the response cards bound into the last two issues. If you are not on the mailing list and would like to be, please return the response card bound into this issue, or call your local sales office or the factory. amplifiers challenge the industry standard OP-27 and improve upon its noise performance. Alex is a Vermont native who has been designing analog integrated circuits for over 14 years. Sammy Lum introduces the LTC1292 serial I/O, 12-bit data acquisition system. The LTC1292 is an 8-pin, differential-input, CMOS analog-to-digital converter, which is quite easy to use. Sammy designed the 12-bit A/D series which includes the LTC1290 through 1294 and the LTC1296. He has been designing in CMOS since 1979. Tim Skovmand and Willie Rempfer were contributors to the last issue. Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES CHARGE PUMP/ BOOST REG. BOOST DRIVE ENABLE BOOST CEN TOP GATE DR. DRIVE - FAULT BOOTSTRAP CAPACITOR RGATE V+ FEEDBACK + INPUT DC-100kHz CONTROL LOGIC SOURCE SENSE + CURRENT LIMIT RSENSE TO LOAD SENSE - BOT. GATE DR. DRIVE - RGATE FEEDBACK + 1158_1. eps Figure 1. LT1158 block diagram with pins shown in actual package sequence LT1158 continued from page 1 MOSFETs on the top side in low voltage bridge circuits. However, even this solution is no longer straightforward when the supply voltage exceeds the maximum gate-to-source voltage (VGS) rating for the MOSFET (typically 20V). capacitor can become overcharged. On the other hand, if at high duty cycles the output is not swinging low enough to fully recharge the capacitor, then the top-side gate drive will be starved, leading to over dissipation. The best solution to this problem is to use a floating top-side N-channel gate driver operating from a bootstrap capacitor. Although widely used, the technique of bootstrapping must be carefully implemented, since the gate voltage applied to the top MOSFET derives directly from the voltage on the bootstrap capacitor. If this voltage becomes either too high or too low, it can cause problems for the MOSFET. For example, if the bootstrap supply is referenced to ground, but the bottom of the capacitor is swinging below ground due to output transients, the In the LT1158, the internal charge pump and boost regulator have been designed to prevent both under- and over-drive of the top-side gate, regardless of the input duty cycle--up to and including 100% (DC). With the LT1158, using N-channel MOSFETs becomes as painless as using P-channels. Linear Technology Magazine * February 1992 Shoot-Through Unwelcome Probably the most frustrating element to address in a synchronous MOSFET drive circuit is the timing between the top and bottom drives to prevent cross-conduction. Although the presence of cross-conduction or "shootthrough" currents can lead in extreme cases to catastrophic heating, it usually causes only a puzzling reduction of several percent in efficiency. Since efficiency is the reason for using synchronous switching in the first place, it's rather frustrating when it keeps slipping through your (hot) fingers. Present techniques rely on fixed delay times to create a dead-time between conduction of the top and bottom MOSFETs. Although this can be made to work, the delay time must take into account temperature changes, supply variations, and production tolerances of the MOSFETs and other components. And if the driver can't hold the gate low against output-voltage continued on page 4 3 DESIGN FEATURES 0.1F 0.1F 1N4148 24V IN 4.7k 4.7k + NI INV VREF BST DR 1N4148 A BST + LT3525 10k + 0.01F fOSC = 25kHz 30k LT1158 5F 7m 5V/10A OUT SRC SEN+ + SEN- - FAULT SOFT-ST + L1* 70H T FB IN B 1F COMP (2) 500F LOW ESR T DR 1N4148 VC IRFZ34 + (2) 1000F LOW ESR (2) IRFZ44 B DR MBR340 B FB 2.4k 1158_2. eps *1 1/4" MP CORE 14GA WIRE Figure 2. 50W high efficiency switching regulator illustrates the design ease afforded by adaptive dead-time generation LT1158 continued from page 3 The LT1158 uses an adaptive system that maintains dead-time independent of the type, the size, and even the number of MOSFETs being driven. It does this by monitoring the gate turn-off to see that it has fully discharged before allowing the opposite MOSFET to turn on (see Figure 1). During turn-on, the hold-off capability of the opposing driver is boosted to prevent transient shoot-through. In this way, cross-conduction is completely eliminated as a design constraint. The high efficiency 10A step-down (buck) switching regulator shown in Figure 2 illustrates how different sized MOSFETs can be used without having to worry about shoot-through currents. Since 24V is being dropped down to 5V, the duty cycle for the switch (top MOSFET) is only 5/24 or 21%. This means that the bottom MOSFET will dominate the RDS(ON) efficiency losses, because it is turned on nearly four times as long as the top. Therefore a smaller MOSFET is used on the top, and the bottom MOSFET is doubled up, all without having to worry about dead-time. The non-critical 4 Schottky diode across the bottom MOSFETs reduces reverse-recovery losses. Figure 3 shows the operating efficiency for the Figure 2 circuit. Switching regulator applications can take advantage of an important protection feature of the LT1158: remote fault sensing. By sensing the current on the output side of the inductor and returning the LT1158 fault pin to the PWM soft-start pin, a true currentmode loop is formed. The Figure 2 circuit regulates maximum current in the inductor to 15A with no output voltage overshoot upon recovery from a short circuit. of adding high current Schottky diode clamps. MOSFET protection schemes usually rely on detecting either excess current or excess drain-to-source voltage (VDS). The LT1158 currentlimit strategy combines the best features of current sensing and VDS sensing. Current limit is set by the voltage drop across the current shunt RSENSE, shown in Figure 1. However, as long as the voltage drop across the top MOSFET and RSENSE is less than 1.2V (representing a relatively low dissipation state for the MOSFET), higher current is allowed to flow. This allows Designing in Ruggedness 95 The output of a bridge circuit driving multiple-ampere inductive loads can be a very ugly signal to couple back into a hapless IC. Although MOSFETs contain integral catch diodes which conduct during the deadtime, slow turn-on times and wiring inductances can result in spikes of several volts below ground or above supply. The LT1158 source pin and both sense pins have been designed to take repetitive output transients 5V outside the supply rails with no damage to the part. This saves the expense 90 EFFICIENCY (%) slew-rate-induced currents, transient shoot-through will occur. 85 80 75 0 2 4 6 8 10 OUTPUT CURRENT (A) 1158_3. eps Figure 3. Operating efficiency for Figure 2 circuit. Current limit is set at 15A Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES 0.1F 0.1F 1N4148 BAT85 BST DR 15 BAT85 10V-30V BST + IRFZ34 T DR 1N4148 BST IRFZ34 (2) 500F LOW ESR BST DR 15 T DR T FB T FB SRC SRC LT1158 LT1158 SEN+ SEN+ 15m 15m SEN- SEN- 15 B DR IRFZ34 2.4k 2.4k IRFZ34 15 B DR B FB B FB IN IN PWM INPUT 1/2 74HC132 1158_4A. eps Figure 4a. 10A locked anti-phase full-bridge circuit operates over wide supply range long time constant, high-inrush loads, such as high-inertia motors, to be started. When the voltage drop across RSENSE exceeds 110mV with more than 1.2V across the MOSFET (as in the case of a short), the fault pin conducts. to allow it to serve as a protection timer. With the fault and enable pins connected, the LT1158 will shut down both MOSFETs in the event of a fault and retry each time the enable capacitor CEN recharges by 1.5V. set, disabling both LT1158s. The circuit periodically tries restarting the motor at a time interval determined by RT and CT. If the short still exists, the disabled state is resumed within 20s, far too short a time to move the motor. If both the input and enable pins remain high during a short, the LT1158 regulates the top MOSFET current to a value of 150mV/RSENSE while awaiting a shutdown command. Shutdown can be performed by an external controller, or it can be performed locally by connecting the fault pin to the enable pin (as in Figure 1). The LT1158 enable pin has been designed with 1.5V of hysteresis and a 25A pull-up current source The flexibility of the LT1158 current limit allows other protection schemes to be implemented. Figure 4 illustrates a locked anti-phase motor drive in which the motor stops if either side is shorted to ground (since a 50% input duty cycle is used to stop the motor in normal operation, the motor would accelerate to half speed with one side shorted). When a fault is detected by either LT1158, the Figure 4b latch is The LT1158 can be used with virtually any N-channel power MOSFET, including 5-lead, current-sensing MOSFETs. This configuration offers the benefit of lossless current sensing, since a current shunt is no longer needed in the source. In addition, RSENSE increases by a factor of 1000 or more: from milliohms to ohms. The LT1158 can also be used with logiclevel MOSFETs for operation as low as 4.5V if a Schottky boost diode is used and connected directly to supply. +5V 1/2 74HC132 5k Conclusion 0.01F FROM LT1158 FAULT PINS TO LT1158 ENABLE PINS RT 150k CT 0.1F 1N4148 1158_4B. eps Figure 4b. Proection logic stops motor if either side is shorted to ground Linear Technology Magazine * February 1992 The LT1158 N-channel power MOSFET driver anticipates all of the major pitfalls associated with the design of high efficiency bridge circuits. The designed-in ruggedness and numerous protection features make the LT1158 the best solution for 5 to 30V, medium-to-high-current synchronous switching applications. 5 DESIGN FEATURES The LTC1096/1098: Micropower, SO-8 Packaged ADCs Draw 100A at 33kHz, 3A at 1kHz by William Rempfer MICROPOWER, SO-8, SAMPLING 8-BIT ADCs As Figure 1 shows, both the LTC1096 and the LTC1098 comprise an 8-bit, switched-capacitor ADC, a sample-and-hold, and a serial port. With typical operating currents of 100A and automatic shut-down between conversions, they achieve extremely low power consumption over a wide range of sample rates (see Figure 2). As the sample frequency decreases, the current drain drops. Even lower power consumption can be achieved by operating the ADCs VCC (VCC /VREF) CS BIAS AND SHUTDOWN CIRCUIT IN+ (CH0) DOUT IN- (CH1) + S A R MICROPOWER COMPARATOR CAPACITIVE DAC GND VREF (DIN) 3 0.3 100 1k 10k 33k SAMPLE RATE (Hz) 1096_2. eps on a 3V supply. The LTC1096 operates from single 3V to 9V supplies and the LTC1098 operates from 3V to 6V supplies. Both devices can sample at rates of up to 33kHz. Figure 3 shows remarkable sampling performance for a device that draws only 100A running at full speed. Dynamic accuracy of 7.5 bits is maintained up to an input frequency of 40kHz. CSAMPLE - 30 Figure 2. Automatic power shutdown between conversions allows power consumption to drop with sample rate CLK SERIAL PORT 100 ICC, TYP (A) LTC's new 8-bit micropower, switched-capacitor ADCs typically draw only 100A of supply current when sampling at 33kHz. Supply current drops linearly as the sample rate is reduced. At a 1kHz sample rate, the supply current is 3A. The ADCs automatically power down, drawing only leakage current when not performing conversions. They are packaged in 8pin SO packages and operate on 3V to 9V supplies or batteries. Both are fabricated in Linear Technology's proprietary LTBiCMOS process. PIN NAMES IN PARENTHESES REFER TO THE LTC1098. 1096_1. eps Figure 1. Micropower design of the ADC's BiCMOS comparator achieves a 33kHz sample rate on 100A of supply current. Automatic power shutdown between conversions saves power as sample rate is reduced Although they share the same basic design, the LTC1096 and 1098 differ in some respects. The LTC1096 has a differential input and has an external-reference input pin. It can measure signals floating on a DC common mode voltage and can operate with reduced spans down to 250mV. Reducing the span allows it to achieve 1mV resolution. The LTC1098 has a two-channel input multiplexer and can convert either channel with respect to ground or the difference between the two. (LTBiCMOS is a trademark of Linear Technology Corporation.) 6 Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES BENEFITS OF THE LTC1096/98 Cheaper, Simpler Power Supplies Lower System Cost Table 1 summarizes the features of the LTC1096 and LTC1098. These features can reduce system cost in several ways. Single-supply operation means no additional supplies are needed to power the device. It runs right off the logic supply (5V or 3.3V). In battery-powered systems, it can eliminate the need for a voltage regulator by running straight off the battery. The internal sample-and-hold saves the cost of an external sample-andhold in sampling systems. LTC1096 FFT fSAMPLE = 31.25kHz, fIN = 11.8kHz 0 -10 -20 AMPLITUDE (dB) - 30 - 40 - 50 - 60 - 70 - 80 - 90 -100 -110 -120 0 2 4 8 6 10 12 14 16 FREQUENCY (kHz) 1096_3a. eps Figure 3a. This clean FFT of an 11.8kHz input shows remarkable performance for an ADC that draws only 100A when sampling at its maximum 33kHz rate LTC1096 EFFECTIVE NUMBER OF BITS vs INPUT FREQUENCY fSAMPLE = 31.25kHz EFFECTIVE NUMBER OF BITS (ENOBs) 8 7 6 5 4 3 2 1 0 0 20 40 INPUT FREQUENCY (kHz) 1096_3b. eps Figure 3b. Dynamic accuracy is maintained up to an input frequency of 40kHz Linear Technology Magazine * February 1992 A cheaper and simpler power supply can be designed because of the low supply current and wide supply-voltage range. For example, a simple capacitive charge pump can provide a floating supply for the device, as shown in Figure 8. The on-chip sample-andhold saves the power consumption and extra supply voltages required by external sample-and-holds. Longer Battery Life Tremendous gains in battery life are possible because of the wide supplyvoltage range, the low supply current, and the automatic power shut-down between conversions. Eliminating the voltage regulator and operating directly off the battery saves the power lost in the regulator. At a sample rate of 1kHz, the LTC1096/8 draws only 3A of supply current. This is below the selfdischarge rate of many batteries. As an example, the circuit of Figure 4a, sampling at 1kHz, will run off a Panasonic CR1632 3V lithium coin cell for five years. The automatic shutdown has great advantages over the alternative of highside switching a higher power ADC, as shown in Figure 4b. First, no switching signal or hardware is required. Second, power consumption is orders of magnitude lower with the LTC1096/8. This is because, when an ADC is highside switched, the current consumed in charging the required bypass capacitor is large, even at very low sample Table 1. LTC1096/8 Features * Micropower Operation: 40-100A Typical Current * Power Shutdown: 1nA Typical Shutdown Current * SO-8 Packaging * Single Supply 3V-9V Operation * Sample-and-Hold: 33kHz Sample Rate and 40kHz Full-Accuracy Bandwidth * Reduced Reference Operation to 250mV (LTC1096) * 2-Channel Input Multiplexer (LTC1098) rates. In fact, a 10F bypass capacitor, high-side switched at only 10Hz, will consume 500A! Smaller Instrument Size The LTC1096/8 can save board space in compact designs in a number of ways. The ADC comes in an SO-8 package. No external sample-and-hold is needed. The serial I/O requires fewer PC traces and fewer microprocessor pins than a parallel-port ADC. The high-impedance analog inputs and the reduced span capability can eliminate op amps and gain stages for many sensors. In addition to eliminating op amps in many cases, the differential inputs allow the endpoints of the ADC transfer curve to be adjusted to accommodate the limited output swings of single-supply op amps and other singlesupply circuitry. The LTC1098's two-channel multiplexer provides a second channel to measure another signal, such as the battery voltage. 0.1F 3V VCC/VREF CH0 CS LTC1098 CLK TO P DIN CH1 DOUT GND 1098_5a. eps Figure 4a. Sampling at 1kHz, this circuit draws only 3A and will run off a 120mAhr CR1632 3V lithium coin cell for 5 years +5V C 10F OFF/ON e.g. ADC0831 ADC08031 (2.5mA) fSAMPLE ICC = CV fSAMPLE 1Hz 10Hz 50A 500A! 1098_5b. eps Figure 4b. High-side switching a powerhungry ADC wastes power. Repeatedly switching the required bypass capacitor consumes 500A even when taking readings at only 10Hz continued on page 8 7 DESIGN FEATURES LTC1096 continued from page 7 Remote or isolated systems are made easier for three reasons. First, the serial data transmission requires fewer wires than parallel transmission. A system can be isolated with two opto-isolators, one to send the clock and one to return the data. Second, analog signals can be digitized at the source and sent back in digital form, increasing noise immunity and reducing difficulties with analog isolation. Third, the 3V to 9V single supply range and the low power consumption makes it easier to get power to a remote or isolated system. Figure 8 shows a floating system, powered by a diode-capacitor charge pump and transmitting data with two opto-isolators. signal source is near the microprocessor, the noise performance of the LTC1096 is much better than that of built-in ADCs. The power consumption of a system designed with the LTC1096/8 also can be much lower than that of a system with the ADC on the microprocessor. In many CMOS microprocessors without ADCs, the supply current can be made arbitrarily low by reducing the supply voltage and clock frequency. By putting the ADC function in the LTC1096/8, extremely low power consumption can be achieved because the ADC shuts down when not taking readings. The processor can continue to perform operations and timing tasks without any current being consumed by the ADC. The LTC1096 and 1098 make it easier to meet the UL and gas regulations, which limit the allowable bypass capacitor size, by operating with a smaller bypass capacitor. Improved power supply rejection and lower current allow the use of capacitors as small as 0.01F. HOW IT WORKS: THE ADC DESIGN Advantages over Microprocessors with Built-in ADCs Die size must be small in order to achieve SO-8 packaging. Surprisingly, speed can be important in micropower applications that are powered-down between readings. The faster the system can take the required readings, the less time the power needs to be applied and the lower the average power consumption will be. Some systems are powered-up continuously or are constrained to long power-on times for reasons other than ADC conversion time (for example, sensor settling time). In these applications, the ADC must not burn excessive power. As an alternative, designers of 8-bit systems can use a microprocessor with a built in ADC, such as the 68HC11. The LTC1096/8 can have noise, power, size, and cost advantages over built-in ADCs. The LTC1096 is useful with reference voltages much lower than 1V. In contrast, ADCs built into microprocessors can have noise and accuracy problems as the reference is reduced. By reducing the LTC1096's reference, a system can be designed so that the ADC is located near the sensor, permitting it to directly digitize the sensor's output and transmit digital data to the microprocessor. This can result in much lower noise and cost and smaller size than amplifying and sending analog data to the microprocessor package. Even in systems where the 8 The LTC1096 and LTC1098 use a switched-capacitor, successive-approximation (SAR) architecture. The SAR technique provides the best compromise among die size, speed, and power. The LTC1096 and 1098 achieve these goals with a conversion time of 16s at an operating supply current of 100A. They automatically shut down to 1nA typically between conversions, as shown in Figure 5. Adding the power-on wakeup time and data-transfer time gives a throughput time of 29s and a maximum sample rate of 33kHz. Comparator In a switched-capacitor ADC, most of the power is consumed by the comparator. As power is reduced, the primary concern is to keep the comparator as fast as possible. There are some techniques for reducing the power drain of the DAC, logic, and other circuitry, but the comparator is the greatest challenge. 140 SUPPLY CURRENT vs CLOCK RATE FOR ACTIVE AND SHUTDOWN MODES TA = 25C VCC = 5V 120 SUPPLY CURRENT, ICC (A) Easier Remote or Isolated Installations 100 80 60 ACTIVE (CS LOW) 40 20 SHUTDOWN (CS HIGH) 0.002 0 100 1k 10k 100k 1M CLOCK FREQUENCY (Hz) 1098_6. eps Figure 5. After a conversion, when the microprocessor drives CS high, the ADC automatically shuts down until the next conversion. The supply current, which is very low during conversions, drops to zero in shutdown At the low overdrives typically seen in ADCs, the comparator delay is dominated by the first stage. This is because the overdrive for later stages is larger due to the gain of earlier stages. Figure 6a shows the first stage of a comparator. The delay is related to the input overdrive, the transconductance (gm) of the input stage, the capacitive load on the output of the first stage, and the required swing from the first-stageoutput clamp voltage to the trip point of the second stage. Before major bit decisions, the input swings far away from zero and the output of the first stage swings into the clamp. (The first-stage output is clamped because the input of the comparator cannot be clamped without losing charge from the sampleand-hold capacitor.) When the DAC updates, the comparator input will swing back to zero and slightly beyond. In the case of an 8-bit ADC, this overdrive can be as low as 1mV. Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES +V - CS -V VOD COMPARATOR 2nd STAGE CHARGE SUMMING NODE VIN + Ib 0V FOR SMALL OVERDRIVE: C V tDELAY = S gm VOD VDAC 1096_7b. eps 1096_7a. eps Figure 6a. The Bipolar transistor's much higher gm reduces the micropower comparator's delay. At low overdrives, the bipolar transistors can provide more current to charge the stray capacitance than MOSFETs can The comparator delay is roughly the time it takes for the first-stage output to swing from the clamp voltage and cross the trip point of the second stage. Smaller clamp voltage reduces the delay because the output need not travel as far to reach the second-stage trip point. Smaller stray capacitance, CS, will also reduce delay time. The current available to charge the stray capacitance is equal to the input overdrive times the input-stage gm. Increasing the overdrive would speed up the comparison, but in SAR converters the comparator overdrive is set by the ADC resolution. The only way to increase the charging current is to increase the gm of the input stage. A BiCMOS input stage was chosen because bipolar transistors provide higher gm than MOSFETs. Depending on bias conditions, the gm of a bipolar transistor can be orders of magnitude higher. The bipolar input transistor must be buffered by a MOSFET follower to prevent the base current from discharging the sampleand-hold capacitor (see Figure 6b). The composite connection has the g m of a bipolar (required for speed) and the input leakage of the MOSFET. (The noise contributed by the MOSFET is insignificant at the 8-bit level.) The comparator input stage Figure 6b. A MOSFET buffers the critical charge summing node from the bipolar transistor's base current. The composite connection has the gm of the bipolar and the input leakage of the MOSFET consumes 24A and has a typical delay of less than 1s with an overdrive of 1mV. The comparator, DAC, bias circuits, and logic were designed to operate on supplies as low as 3V. Compact Design The LTC1096 and LTC1098 come in 8-pin DIPs or SO-8 packages. The serial I/O allows the ADC function to be put into an 8-pin package. The SAR architecture, being one of the most space efficient, results in a small enough die to fit into an SO-8 package. WHERE IT IS USED: APPLICATIONS The LTC1096/8 can be used in a wide variety of micropower, low voltage, or compact systems. Battery Powered Systems The circuit of Figure 4a will sample at 1kHz for five years powered from a 120mAhr, 3V lithium coin cell. The CS pin is taken low, a conversion is performed, and CS is taken back high. The ADC shuts down and draws only leakage current until the next conversion. 3.3V Logic Systems Figure 7 shows a 3.3V single-supply system. Most analog blocks (sensors, references, op amps, switches, and other analog glue chips) can be found in versions that operate on a 3V supply. The LTC1096 and LTC1098 fill a need for the A/D converter function in 3V systems. They join the 10-bit LTC1283 and the 12bit LTC1289, providing 3V data conversion in a wide variety of resolutions. Micropower Systems The LTC1096 and LTC1098 can be used in low-power applications. In continual use, operating at the full 33kHz sample rate, they typically consume only 100A of supply current. If the sample rate is reduced by a factor of ten, the supply current will also drop by a factor of ten, because the converters shutdown between conversions. At a 1kHz sample rate, the supply current is only 3A. Remote or Isolated Systems Figure 8 shows a floating system that sends data to a grounded host system. The floating circuitry is isolated by two opto-isolators and powered by a simple capacitor-diode charge pump. The system has very low power requirements because the LTC1096 shuts down between conversions and the opto-isolators draw power only when data is being transcontinued on page 10 Linear Technology Magazine * February 1992 9 DESIGN FEATURES 3.3V - SENSORS MPU SYSTEM LTC1096/8 + LT1006 LT1077/8/9 LT1178/9 LT1101 3V LOGIC 3V MICROPROCESSORS 3V MEMORY LT1004 1096_8. eps Figure 7. The LTC1096 and LTC1098 fill a need for ADCs in 3V systems. With the 10-Bit LTC1283 and 12-Bit LTC1289, they provide 3V operation in a wide range of resolutions LTC1096 continued from page 9 ferred. The system consumes only 50A at a sample rate of 10Hz (1ms on-time and 99ms off-time). This is easily within the current supplied by the charge pump running at 5MHz. If a truly isolated system is required, the system's low power simplifies generating an isolated supply or powering the system from a battery. Systems that must fit into a small space can benefit from the SO-8 packaging of the LTC1096/8. Operating the ADC directly off batteries can eliminate the space taken by a voltage regulator. Connecting the ADC directly to sensors can eliminate op amps and gain stages. The LTC1096/ 8 can also operate with small, 0.1F or 0.01F chip bypass capacitors. Figure 9 shows a temperature-measurement system. The LTC1096 is connected directly to the low-cost silicon temperature sensor. The voltage applied to the VREF pin adjusts the full scale of the ADC to the output range of the sensor. The zero point of the converter is matched to the zero output voltage of the sensor by the voltage on the LTC1096's negative input. APPLICATION HINTS: MICROPOWER, SINGLESUPPLY DESIGN itself down when that pin is high. In systems that convert continuously, the LTC1096/8 will draw its normal operating power continuously. Figure 5a shows that the typical current varies from 40A at clock rates below 50kHz to 100A at 500kHz. A 10s wake-up time must be provided to the LTC1096 after each falling CS. (The wake-up time is invisible on the LTC1098 be- Several things must be taken into account to get the lowest power consumption from these micropower ADCs. Figure 10 shows the operating sequence of the LTC1096. The converter draws power when the CS pin is low and shuts FLOATING SYSTEM 1N5817 47F 0.001F 2kV 0.1F 1N5817 75k 2N3904 VCC 0.022 100k 20k CS +IN 1N5817 4N28 100k CLK LT1004-2.5 LTC1096 5MHz 300 VREF -IN CLK GND ANALOG INPUT DOUT 1k 10k DATA 500k 1096_9. eps Figure 8. Power for this floating ADC system is provided by a simple capacitordiode charge pump. The two opto-isolators draw no current between samples, turning on only to send the clock and receive data 10 Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES cause of the time consumed by the input address bits). +3V In systems that have significant time between conversions, lowest power drain will occur with the minimum CS low time. Bringing CS low, waiting 10s for the wake-up time, transferring data as quickly as possible, and then bringing it back high will result in the lowest current drain. This minimizes the amount of time the device draws power. Even though the device draws more power at higher clock rates, the net power is less because the device is on for a shorter time. 0.1F LM134 VCC 678 +IN 13.5k -IN - 0.01F 0.01F CS POWER DOWN 1196_11. eps tWAKE UP (10SEC MIN) tCONVERSION DOUT B7 B6 B5 B4 B3 B2 B1 B0 1096_12. eps Figure 10. The ADC's power consumption drops to zero when CS goes high. 10s after CS goes low, the ADC is ready to convert. For minimum power consumption keep CS high for as much time as possible between conversions To generate a truly single-supply application, all circuitry must run off a single supply. Fortunately, there is a VCC CS 240k OP AMP SWINGS TO 50mV TO P DOUT -IN GND 10k 1096_13. eps Figure 11. The voltage on the negative input sets the zero point of the ADC at 50mV to accommodate the output-swing limitations of single-supply op amps Linear Technology Magazine * February 1992 63.4k CLK VREF ZERO POINT OF ADC SET AT 50mV DOUT GND LTC1096 POWER DOWN AND WAKE UP +IN LTC1096 CLK + TO P Figure 9. The LTC1096's high-impedance input connects directly to this temperature sensor, eliminating signal conditioning circuitry in this 0-70 thermometer 100k LT1004-1.2 CS CLK VREF LT1004-1.2 3V SINGLE SUPPLY OP AMP LTC1096 182k Capacitive loading on the digital output can increase power consumption. A 100pF capacitor on the DOUT pin can more than double the 100A supply current drain at a 500kHz clock frequency. An extra 100A or so of current goes into charging and discharging the load capacitor. The same goes for digital lines driven at a high frequency by any logic. The CxVxf currents must be evaluated and the troublesome ones minimized. These converters are very easy to use because of their low supply current and good power-supply rejection. Of course, a ground plane is recommended and bypass capacitors should be located as close to the device as possible. For reduced reference applications, the layout becomes more critical. 75k good selection of other components for single supply applications, including the LT1006, LT1077/8/9, and LT1178/ 9 op amps, the LT1101 instrumentation amp, the LT1017/8 comparators, and the LT1004 reference. The input span of the LTC1096 can be adjusted above ground to accommodate the limited output swing of single supply op amps, as shown in Figure 11. CONCLUSION Lower system cost, low power, small size, and other benefits will help the LTC1096/8 find their way into a variety of micropower, low-voltage, battery-powered, and compact systems. For more information, refer to the LTC1096/8 data sheet and application notes. 11 DESIGN FEATURES The LT1432: 5-Volt Regulator Achieves by Carl Nelson 90% Efficiency Power-supply efficiency has become a highly visible issue in many portable, battery-powered applications. Higher efficiency translates directly to longer useful operating time--a potent selling point for products such as notebook computers, cellular phones, data-acquisition units, sales terminals, and word processors. The "holy grail" of efficiency for 5V outputs is 90%. ciency at extremely light loads (1-5mA). These applications have a "sleep" mode in which RAM is kept alive to retain information. The instrument may spend days or even weeks in this mode, so battery drain is critical. Ordinary 5V switchers draw quiescent currents of 5 to 15mA for these light loads. The efficiency of a 12V to 5V converter with 10mA supply current and 1mA load is only 4%! Clearly, some method must be provided to eliminate the quiescent current of the switching-regulator control section. For a number of reasons, older designs were limited to efficiencies of 80 to 85%. High quiescent current in the control circuitry limited efficiency at lower output currents. Losses in the power switch, inductor, and catch diode all added up to limit efficiency at moderate-to-high output currents. Each of these areas must be addressed in a design that is to have high efficiency over a wide output-current range. An additional requirement for some systems is full shutdown of the regulator. It would be ideal if a simple logic signal could cause the converter to turn off and draw only a few microamperes of current. The combination of battery form factor, their discrete voltage steps, and the use of higher-voltage wall adapters requires a switching regulator that Some portable equipment has the additional requirement of high effiVIN VSW + C1 330F 35V VIN LT1271 FB VC C6 0.02F GND D2 1N4148 R1 680 C5 0.03F C4 0.1F C3 4.7F TANT + L1 50H VOUT 5V, 3A R2* 0.013 + D1 MBR330P VC < 0.3V = NORMAL MODE > 2.5V = SHUTDOWN OPEN = BURST MODE MODE INPUT 200pF C2 390F 16V V+ DIODE VIN VLIM LT1432 MODE VOUT GND * R2 IS MADE FROM PC BOARD COPPER TRACES L1 = COILTRONICS CTX 50-3-MP (3A) (305) 781-8900 operates with inputs from 6V to 30V. Both of these voltages present problems for a MOS design because of minimum and maximum gate-voltage requirements of power MOS switches. The LT1432 was designed to address all the requirements described above. It is a bipolar control chip that interfaces directly to the LT1070 family of switching regulators, and is capable of operating with 6V to 30V inputs. These ICs have a very efficient quasi-saturating NPN switch which mimics the resistive nature of MOS transistors with much smaller die area. The NPN is a high frequency device with an equivalent voltage and current overlap time of only 10ns. Drive to the switch is automatically scaled with switch current, so drive losses are also low. Switch and driver losses using an LT1271 with a 12V input and a 5V, 500mA load are only about 2%. To reduce quiescent-current losses, the LT1271 is powered from the 5V output rather than from the input voltage. This is done by pumping the supply capacitor, C3, from the output via D2. Quick minded designers will observe that this arrangement does not self-start; accordingly, a parallel path was included inside the LT1432 to provide power to the IC switcher directly from the input during startup. Equivalent quiescent supply current is reduced to about 3.5mA with this technique. Catch-diode losses cannot be reduced with IC "tricks" unless the diode is replaced with a synchronously driven MOS switch. This is more expensive, and still requires the diode to avoid voltage spikes during switch non-overlap times. The question is, is it worth it? 1432_1. eps Figure 1. High efficiency 5V buck converter continued on page 19 12 Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES The LTC1156 Quad High-Side MOSFET Driver By Tim Skovmand The new LTC1156 quad high-side MOSFET driver is designed to protect and control four high-side, N-channel MOSFET switches. N-channel switches offer the lowest possible RDSON, but require gate voltages higher than the power supply rail when used in highside switching applications. The LTC1156 generates this higher voltage completely on-chip. No external capacitors or inductors are required, and the four drivers with protection are housed in a 16-lead SO package. The LTC1156 was designed with micropower applications in mind. Standby current consumption is only 16A from a 5V supply, and the operating current per-channel is only 95A. No external logic is required to revert to the standby mode. Each channel is independently powered and protected to eliminate interaction between drivers and to ensure the lowest possible supply-current demand. + 4-CELL NICAD PACK Typical Applications Applications for the LTC1156 include lap-top computer load switching, cellular-radio power management, high efficiency H bridge drivers, and automotive load switching. Figure 1 illustrates the use of the LTC1156 in a four-cell NiCad notebook-computer power system. The first channel of the LTC1156 generates gate drive for the extremely low voltage drop 5V regulator made up of Q1 and the LT1431. Q1 has an RDSON of 0.1 and the drain sense resistor adds another 0.03. The voltage drop is simply the load current times the total series resistance. Therefore, the regulator drops less than 0.3V at 2A. Or, to put it another way, the regulator delivers 5V out with as little as 5.3V in. The other three switches are powered from the output of the regulator and control + 47F VS Note: Some portable-computer power-management systems utilize P-channel MOSFETs for load switching. Replacing these switches with protected N-channel MOSFETs can significantly reduce power-supply voltage drops and guard against catastrophic MOSFET and printed circuit board damage. 36m** 2.8A MAX 0.1F VS three 5V loads under microprocessor control. Q2 and Q3 are both 0.1 MOSFETs and are housed in the same 8-pin SO package. Q4 is two 0.1 MOSFETs connected in parallel to create a 0.05 switch for powering high-current loads. All of the components shown in Figure 1, including the LTC1156 and the drain-sense current shunt, are available in surface mount packaging and therefore consume very little board space. 100k DS1 DS2 DS3 100k Q1 G1 DS4 IRLR024 5V/2A SWITCHED 0.1F LTC1156 REG ON/OFF P Q3 0.1 IN1 IN2 G2 IN3 G3 IN4 FAULT Q2 SI9956DY GND GND 0.1 Q4 SI9956DY 0.05 G4 200pF 10k 1N4148 LT1431 * CAPACITOR ESR LESS THAN 0.5 ** IMS026 INTERNATIONAL MANUFACTURING SERVICES, INC. (401) 683-9700 5V LOAD 5V LOAD HIGH CURRENT 5V LOAD + 470F* 1156_1. eps Figure 1. Four-cell NiCad notebook power-management system Linear Technology Magazine * February 1992 13 DESIGN FEATURES The LT1103/1105 Family of Offline by Anthony Bonte Switching Regulators Introduction Offline power supplies generate wellregulated DC output voltages from the AC line and provide isolation as defined by various international safety/ regulatory agencies. The Verband Deutscher Elektrothniker (VDE) specifications are generally regarded as the most stringent and a power supply which meets these guidelines is usually capable of worldwide operation. Universal offline power supplies can accept inputs ranging from 85VAC to 270VAC and can operate without alterations or switches. Offline powersupply topologies include the flyback and the forward converter; both employ a transformer to convert one voltage to either a higher or lower voltage. The output voltage can be of either polarity and multiple outputs can be obtained easily by including additional windings. To obtain well-regulated output voltages, a feedback path, which senses the output voltage and which crosses the isolation barrier, is provided. This feedback path typically consists of an opto-isolator along with a voltage reference and an amplifier. This configuration provides the most accurate output-voltage regulation at the expense of numerous discrete components, board space, aging considerations for the opto-isolator, and design problems associated with loop stability, spurious noise pickup, startup, and output overshoot. A simpler method for providing a feedback path is magnetic flux-sensing. In this mode, the flyback voltage on the primary winding during "switchoff" time is sensed and regulated. It is difficult to derive a feedback signal directly from the primary flyback voltage, as this voltage is several hundred volts. A common practice is to provide a lower-voltage auxiliary (or bias) winding from which the feedback signal is generated. This bias winding is also convenient for powering the switching regulator IC. VSW 15V 15V GATE BIAS 16V OSC STARTUP GATE BIAS DETECT OSCILLATOR DRIVER LOGIC VIN 7V SPIKE BLANK 5V VREF 4.5V CURRENT LIMIT AMPLIFIER COMP + + 5V SAMPLING ERROR AMP gm = 0.012 ANTI-SAT AV = 10 0.15 - - FB 6V OVERVOLTAGE LOCKOUT 0VLO 40A SHUTDOWN RESET 2.5V 0.15V VC SS GND 1103_1. eps Figure 1. LT1103 block diagram 14 Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES Practical flux-sensing simplifies the design of offline power supplies by minimizing the total number of external components. In addition, it reduces the number of components which must cross the isolation barrier to one, the transformer, resulting in greater safety and reliability. Although magnetic flux-sensing has been used in the past, the technique has exhibited poor output-voltage regulation due to the parasitic elements present in a transformer-coupled design. Another problem is that transformers which provide the safety and isolation required by VDE also provide the poorest output-voltage regulation. 1:N VIN L (lksec) RP D1 VOUT C1 COMMON L (lkpri) N = TRANSFORMER TURNS RATIO FROM SECONDARY TO PRIMARY. N1 = TRANSFORMER TURNS RATIO FROM SECONDARY TO BIAS. S1 N2 = N/N1 L (lkpri) = PRIMARY LEAKAGE INDUCTANCE. L (lksec ) = SECONDARY LEAKAGE INDUCTANCE. VBIAS RP = LUMPED SUM EQUIVALENT OF SECONDARY WINDING RESISTANCE, OUTPUT DIODE RESISTANCE AND OUTPUT CAPACITOR RESISTANCE. FEEDBACK SIGNAL IS DERIVED FROM BIAS WINDING VOLTAGE 1:N1 1103_2. eps Figure 2. Simplified flyback converter These problems are addressed by a new family of offline switching regulator ICs. The LT1103 is designed for high-input-voltage applications using an external FET whose source is driven by the open-collector output stage of the IC. The LT1105 uses a totem pole output stage that drives the gate of an external FET. The unique design of the LT1103/LT1105 eliminates the need for an opto-isolator while providing 1% line and load regulation in a magnetic flux-sensed topology. This level of performance is achieved with a novel sampling-error amplifier in the control loop of the switching regulator. A block diagram for the LT1103 is shown in Figure 1. The block diagram for the LT1105 is identical except for the totem pole output stage and the availability of the input to the currentlimit amplifier for use with an external current-sense resistor. Theory A brief review of flyback-converter operation and the problems which create a poorly regulated output will provide insight on how the LT1103/ LT1105 address the issues of magnetic flux-sensed converter design. Figure 2 shows a simplified diagram of a flyback converter using magnetic fluxsensing. The parasitic elements present in the transformer-coupled design are indicated. The relationships between the primary voltage, the secondary voltage, the bias voltage, and the winding currents are indicated in Figures 3 and 4 for continuous and discontinuous modes of operation. When the switch "turns on," the primary winding sees the input voltage and the secondary and bias windings go to negative voltages. Current builds in the primary as the transformer stores energy. When the switch "turns off," the voltage across the switch flies back to a clamp level as defined by a snubber network until the energy in the leakage-inductance of the primary dissipates. Leakage inductance is one of the main parasitic elements in a flux-sensed converter; it is modeled as an inductor in series with the primary and secondary of the transformer. These parasitic inductances contribute to changes in the bias-winding voltage, and hence in the output voltage, with increasing load current. Various winding techniques exist for reducing the leakage inductances of a transformer. However, VDE requirements for safety and isolation effect these techniques severely and thus limit their usefulness. The energy stored in the transformer transfers to the secondary and bias windings during "switch off" time. Ideally, the volt- age across the bias winding is set by the DC output voltage, the forward voltage of the output diode, and the turns ratio of the transformer (after the energy in the leakage-inductance spike of the primary dissipates). This relationship holds until the energy in the transformer drops to zero (discontinuous mode) or the switch turns on again (continuous mode). Therefore, the voltage on the bias winding is only valid as a representation of the output voltage while the secondary is delivering current. Although the bias-winding flyback voltage is a representation of the output voltage, this voltage is not constant. For a brief period following the leakage-inductance spike, the biaswinding flyback voltage decreases due to nonlinearities and parasitic elements present in the transformer. Following this nonlinear behavior is a period when the bias-winding flyback voltage decreases linearly. This behavior is easily explained. Current flow in the secondary decreases linearly at a rate determined by the voltage across the secondary and the inductance of the secondary. The parasitic secondaryleakage inductance appears as an impedance in series with the secondary winding. In addition, parasitic resistances exist in the secondary winding, continued on page 16 Linear Technology Magazine * February 1992 15 DESIGN FEATURES LT1103 continued from page 15 VZENER PRIMARY SWITCH VOLTAGE VIN [VOUT + Vf + (ISEC * RP)] = N PRIMARY FLYBACK VOLTAGE 0V SECONDARY VOLTAGE 0V [VOUT + Vf + (ISEC * RP)] N * VIN BIAS WINDING VOLTAGE the output diode, and the output capacitor. These impedances combine to form a lumped-sum equivalent and cause a voltage drop as secondary current flows. This voltage drop is coupled from the secondary to the bias-winding flyback voltage and becomes more significant as the output is loaded more heavily. The voltage drop is largest at the beginning of "switch off" time and smallest just prior to either all transformer energy being depleted or the switch turning on again. 0V [VOUT + Vf + (ISEC * RP)] = N1 BIAS FLYBACK VOLTAGE N2 * VIN IPRI I The best representation of the output voltage occurs just prior to either all transformer energy being used up and the bias-winding voltage collapsing to zero or just prior to the switch turning on again and the bias-winding voltage going negative. This point in time also corresponds to the smallest forward voltage for the output diode. It is possible to redefine the relationship between the secondary-winding voltage and the bias-winding voltage as: PRIMARY CURRENT V BIAS = (VOUT + Vf + I x R) 0A I ISEC = PRI N SECONDARY CURRENT 0A IPRI I SWITCH CURRENT N1 where Vf is the forward voltage of the output diode, I is the current flowing in the secondary, R is the lumped-equivalent secondary-parasitic impedance and N1 is the transformer-turns ratio from the secondary to the bias winding. It is apparent that even though the above point in time offers the most accurate representation of the output voltage, the answer given by the bias-winding voltage still differs from the "true" answer by the amount 0A 1103_3. eps Figure 3. Continuous-mode flyback converter waveforms IxR . N1 1% line and load regulation over a wide range of line and load conditions. The answer to these problems is provided by a unique sampling-error amplifier built into the LT1103/LT1105. It comprises a leakage-inductance spike blanking circuit, a slew-rate-limited tracking amplifier, a level detector, a sample-and-hold, an output transconductance (gm) stage and load regulation correction circuitry. When viewed from a system or block level, the samplingerror amplifier behaves like a simple transconductance amplifier. Here's how it works. The feedback network no longer comprises a traditional diode/capacitor peak detector in conjunction with a resistor divider network. Instead, the feedback network consists of a diode in series with the bias-winding, which feeds the resistor divider network directly. The resultant error signal is fed into the input of the error amplifier. Rather than acting as a peak detector, the diode in series with the bias winding serves to prevent the FB pin (input to the error amplifier) from being pulled negative and forward biasing the substrate of the IC when the bias winding changes polarity with "switch turn-on." The primary-winding leakage-inductance spike effects are first eliminated with an internal blanking circuit in the LT1103/1105 which suppresses the input of the FB pin for 1.5s at the start of "switch-off" time. This prevents the primary-leakage inductance spike from being propagated through the error amplifier and affecting the regulated output voltage. This achieves 5% regulation, comparable to the performance of previously available solutions. Innovation The LT1103/LT1105 offline switching regulators provide a solution for each of the problems in a magnetic fluxsensed topology and are able to achieve 16 With the effects of the leakage-inductance spike eliminated, the effects of decreasing bias-winding flyback voltage can be addressed. With the traditional diode/capacitor peak-detector Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES circuitry eliminated from the feedback network, the tracking amplifier of the LT1103/LT1105 follows the flyback waveform as it changes with time and amplifies the difference between the flyback signal and the internal reference. Tracking is maintained until the bias winding voltage collapses as a result of all transformer energy being depleted (discontinuous mode) or the switch turning on again (continuous mode). The level-detector circuit senses the fact that the bias winding flyback voltage is no longer a representation of the output voltage and activates an internal peak detector. This effectively saves the most accurate representation of the output voltage, which is then buffered to the second stage of the error amplifier. The second stage of the error amplifier consists of a sample-and-hold. When the switch "turns on", the sample-andhold samples the buffered error voltage for 1s and then holds it for the remainder of the switch cycle. This held voltage is then processed by the output gm stage and converted into a control signal at the output of the error amplifier (the VC pin). This tracking and sampling technique improves the outputvoltage regulation from 5% to 2-3%. The final adjustment in regulation to 1% or better is provided by the load-regulation correction circuitry. As stated earlier, output regulation degrades with increasing load current (output power). This effect is traced to secondary leakage inductance and parasitic secondary-winding, diode, and output-capacitor resistances. Even though the tracking amplifier has obtained the most accurate representation of the output voltage, its answer is still flawed by the amount of the voltage drop across the parasitic lumpedsum equivalent impedance which is coupled to the bias-winding voltage. This error increases with increasing Linear Technology Magazine * February 1992 load current. Therefore, a technique for sensing load-current conditions has been added to the LT1103/LT1105. The switch current is proportional to the load current as defined by the turns ratio of the transformer. A small current, proportional to switch current, is generated in the LT1103/ LT1105 and fed back to the FB pin. This allows the input-bias current of the sampling-error amplifier to be a function of load current. A resistor in series with the feedback pin generates a linear increase in the effective reference voltage with increasing load current. This translates to a linear increase in output voltage with increasing load current. By adjusting the value of the series resistor, the slope of the load compensation is adjusted and can be set to cancel the effects of these additional parasitic voltage drops. Thus, load regulation can be improved to 1% or better. Conclusion The new LT1103/LT1105 offline switching regulators eliminate the need for an opto-isolator while providing 1% line and load regulation in a magnetic flux-sensed converter. Practical flux-sensing simplifies the design of universal offline power supplies, reduces the total number of external components, and provides greater safety and reliability, as only the transformer requires VDE conformance. Special circuitry built into the LT1103/ LT1105 addresses the problems of primary-leakage inductance spikes, nonlinear transformer behavior and parasitic impedances, which are present in a transformer-coupled design and which previous switching regulators have failed to address. Therefore, the LT1103/LT1105 offline switching regulators provide an economical and technological advantage for the user who needs well-regulated DC output voltages from the AC line. VZENER PRIMARY SWITCH VOLTAGE VIN [VOUT + Vf + (ISEC * RP)] = N PRIMARY FLYBACK VOLTAGE 0V SECONDARY VOLTAGE 0V [VOUT + Vf + (ISEC * RP)] N * VIN BIAS WINDING VOLTAGE 0V [VOUT + Vf + (ISEC * RP)] = N1 BIAS FLYBACK VOLTAGE N2 * VIN IPRI PRIMARY CURRENT I 0A I ISEC = PRI N SECONDARY CURRENT 0A IPRI SWITCH CURRENT I 0A 1103_4. eps Figure 4. Discontinuous-mode flyback converter waveforms 17 DESIGN FEATURES The LT1124/1125: What's New in Precision, High-speed Op Amps by Alexander Strong The LT1124/1125 undergo more rigorous testing than conventional, multiple op amps. Each individual amplifier is tested at room temperature for 1kHz noise performance and 100kHz gain-bandwidth product. Slew rate is tested over the specified temperature ranges. This testing is performed for all grades and package styles. Other manufacturers perform noise tests using only a single measurement, as shown in Figure 1. When the amplifiers are connected in series and a single test is performed, the noise contributions of the individual op amps are RMS summed. For a quad amplifier, the total noise would be: en out = (ena)2 + (enb)2 + (enc)2 + (end)2 If the LT1125 were tested this way, the noise limit would be: 4 x (4.2nV/Hz)2 = 8.4nV/(Hz)1/2 This method has an inherent flaw. If three of the four op amps have a typical noise of 2.7nV/(Hz)1/2, and the fourth op amp is contaminated and has 6.9nV/(Hz)1/2 noise, which is 64% over the 4.2nV/(Hz)1/2 limit, the result would be: RMS sum = (2.7)2 + (2.7)2 + (2.7)2 + (6.9)2 = 8.33nV/(Hz)1/2 This part passes the test, but should it be sold? Clearly, a combined amplifier noise test, although better than a sample test or no test at all, is not an effective screen. This is why multiple op amps should be tested individually for noise. Thorough test procedures and tighter specifications make the LT1124/1125 stand out from the competition. Traditionally, dual and quad op amp performance is degraded relative to the performance of single op amps. For the LT1124/25, this is not the case. Table 1 summarizes the performance of the LT1124/1125 compared to the low-cost grades available from other manufacturers. The comparison shows that the specifications of the LT1124/1125 not only equal those of the industry-standard OP-27, but are, in most cases, superior. For applications requiring higher slew rates or gain-bandwidth products, decompensated versions of these parts are available. The LT1126 (dual) and the LT1127 (quad) offer slew rates of 11V/s and gain-bandwidth products of 65MHz, while maintaining the - - - - B A D C OUT + + + + 1124_1. eps same noise specifications and DC performance as the LT1124/1125. The LT1126 and LT1127 are stable at a gain of ten or more. The LT1124/25 and LT1126/27 families are compensated to maximize gain over the audio range. The maximum gain at 20kHz is 53dB for the LT1124/1125 and 67dB for the (Av = 10 stable) LT1126/27. High closed-loop gain makes this family of op amps an excellent choice for low-distortion signal processing. The combination of low distortion and low noise puts the LT1124/25/26/27 ahead of the competition in precision applications. Figure 2 shows a comparison of the LT1124, the LT1126, the OP-270, and the industry-standard OP-27 single. TOTAL HARMONIC DISTORTION + NOISE (%) The LT1124 and LT1125 are new dual and quad low-noise op amps. These parts have been optimized for DC performance, AC precision, and low noise, and are packaged in surface-mount for optimum performance per-square-mil of circuit-board area. Both the 8-pin surface-mount LT1124 and the 16-pin surface-mount LT1125 are equal in specifications to the DIPpackaged versions. 0.1 0.010 AV = -10 VO = 20Vpp RL = 2k MEASUREMENT BANDWIDTH = 10Hz TO 80kHz LT1124 OP270 OP27 0.001 0.0001 20 LT1126 100 1k 10k 20k FREQUENCY (Hz) 1124_2. eps Figure 2. Total harmonic distortion plus noise vs frequency comparison All of the amplifiers have high DC gains and low noise characteristics which make them good choices for applications under 200Hz. The LT1124 has better gain linearity and the same distortion as the OP-270 at 10 x the frequency. Also it has superior gainbandwidth when compared to the OP27 single. For higher performance in gains of ten or more, the LT1126 out performs them all. continued on page 19 Figure 1. Competing quad op amp noise-test method 18 Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN FEATURES LT1124 continued from page 18 Table 1. Performance Comparison Guaranteed performance, VS = 15V, TA = 25C, low cost devices. PARAMETER/UNITS Voltage Noise, 1kHz Slew Rate Gain-Bandwidth Product Offset Voltage Offset Current LT1124 LT1125 LT1124 LT1125 Bias Current Supply Current/Amp Voltage Gain, RL = 2k Common Mode Rejection Ratio Power Supply Rejection Ratio S8 Package LT1124CN8 LT1125CN OP-27 GP OP-270 GP OP-470 GP UNITS 4.2 100% Tested 2.7 100% Tested 8.0 100% Tested 100 140 20 30 30 2.75 1.5 106 110 Yes - LT1124 4.5 Sample Tested 1.7 Not Tested 5.0 Not Tested 100 - 75 - 80 5.67 0.7 100 94 Yes - No Limit 1.7 5.0 Sample Tested 1.4 nV/Hz - No Limit 250 - 20 - 60 3.25 0.35 90 104 No - No Limit - 1000 - 30 60 2.75 0.4 100 105 - V/s MHz V V nA nA nA mA V/V dB dB Table LT1124/1 LT1432 continued from page 12 The following formula was developed to calculate the improvement in efficiency when adding a synchronous switch. Efficiency change = (VIN - VOUT)(Vf - RFET x IOUT)(E)2 (VIN)(VOUT) With VIN = 10V, VOUT = 5V, Vf (diode forward voltage) = 0.45V, RFET = 0.1, and IOUT = 1A, the improvement in efficiency is only 2.8%. This does not take into account the losses associated with MOS gate drive, so real improvement would probably be closer to 2%. The availability of low-forward-voltage Schottky diodes such as the MBR330P makes synchronous switches less attractive than they used to be. To achieve higher efficiency during "sleep," the LT1432 has a burst mode. In this mode, the LT1271 is either driven full on or completely shut down to its micropower state. The LT1432 acts as a comparator with hysteresis instead of a linear amplifier. This mode reduces equivalent input supply current to 1.3mA with a 12V battery. Battery life with NiCad AA cells is over 300 hours with a 1mA 5V load. Burst mode increases output ripple, especially with higher output currents, Linear Technology Magazine * February 1992 so maximum load in this mode is 100mA. The LT1271 normally draws about 50-100A in its shutdown state. A shutdown command to the LT1432 opens all connections to the LT1271 VIN pin, so its current drain is eliminated. This leaves only the shutdown current of the LT1432 and the switch leakage of the LT1271, which typically add up less than 20A--less than the self-discharge rate of NiCad batteries. For many applications, the on/off function is under keystroke control. Digital chips which draw only a few microamps are available for keystroke recognition and power control. There is no way to design around inductor losses. These losses are minimized by using low-loss cores such as molypermalloy or ferrite, and by sizing the core to use wire with sufficient diameter to keep resistive losses low. The 50H inductor shown has a core loss of 200mW with type-52 powderediron material, and 28mW with molypermalloy. For a 1A load this represents efficiency losses of 4% and 0.56% respectively--a major difference. Ferrite cores would have even lower losses than molypermalloy, but the "moly" has such low losses that ferrites should be chosen for other reasons, such as height, cost, mounting, and the like. DC resistance of the inductor shown is 0.02. This represents an efficiency loss of 0.4% at 1A load and 0.8% at 2A. Significant reduction in these resistance losses would require a somewhat larger inductor. The choice is yours. The LT1432 has a high efficiency current limit, with a sense voltage of only 60mV. This has a side benefit in that printed circuit board trace material can be used for the sense resistor. A 3A limit requires a 0.02 sense resistor and this is easily made from a small section of serpentine trace. The 60mV sense voltage has a positive temperature coefficient that tracks that of copper, so that the current limit is flat with temperature. Foldback current limiting can be easily implemented. The LT1432 represents a significant improvement in high efficiency 5V supplies that must operate over a wide range of load currents and input voltages. Its efficiency has a very broad peak that exceeds 90%, requiring a new definition of the "holy grail." Logic controlled shutdown, milli-power burst mode, and efficient, accurate, current limiting make this new regulator extremely attractive for battery-powered applications. 19 DESIGN IDEAS FEATURES Introducing the LTC1292: 12-Bit, 8-Pin, Serial-I/O Data Acquisition System by Sammy Lum The LTC1292 is a 12-bit data acquisition system that contains a 12-bit, switched-capacitor, successive-approximation A-to-D converter, a differential input, a sample-and-hold on the (+) input, and serial I/O. All these functions are packaged in an 8-pin DIP. Given its accuracy, ease of use, and small package size, this device is well suited for digitizing analog signals in remote applications where a minimum number of interconnects and low power consumption are important. Three circuits are presented here to show the capabilities of the device. the LTC1292 is to compensate for the loading of the bridge by resistor RS. Full scale can be adjusted by the 500k trim pot and offset can be adjusted by the 100 trim pot in series with RS. A lower RPLAT value than that in AN43 is used here to improve dynamic range. The signal voltage on the +IN pin must not exceed VREF. The differential voltage range is VREF minus approximately 100mV. This is enough range to measure 0C to 400C with 0.1C resolution. The circuit in Figure 1 shows how a transducer output, such as a platinum RTD bridge, can be digitized with one op amp. This circuit is a modification of that found in Application Note 43.1 The differential input of the LTC1292 removes the common mode voltage. The LT1006 is used for amplification. The resistor tied between pin 3 of the LT1006 and the +IN input of The circuit in Figure 2 demonstrates how to float the LTC1292 to make a differential measurement. This circuit will digitize a 5V range from 10V to 15V with 12-bits of resolution. The digital I/O has been level translated. The LT1019-5 is used in shunt mode to create the floating analog ground for the LTC1292. The digital I/O lines make use of 4.3V zeners to clamp the single-transistor inverters. Opto-isolators can also be used. The floating analog ground should be laid out as a ground plane for the LTC1292. The 47F bypass capacitor should be tied from the VCC pin to the floating ground plane with minimum lead length and placed as close to the device as possible. Likewise, keep the lead length from the GND pin to the floating ground plane at a minimum (a low-profile socket is acceptable). The circuit in Figure 3 digitizes the difference in temperature between two locations. The two LM134s are used as temperature sensors. These are ideally suited for remote applications because they are current output devices. This allows long wires to run from the sensor back to the LTC1292 without any degradation to the signal from the sensor. Resistor RSET sets the current to 1A/K. The current is converted to a voltage by the resistor R1 connected from V - to ground. The reference voltage and resistor were selected to give a change of 0.05C/LSB. The resolution +5V +15V LT1027 100pF 4.7F TANTALUM 1F 1M** D0 12k* 12.5k* 100 0C TRIM 1N4148 500k 400C TRIM MPU (e.g., 68HC11) 0.1F - RS 13k** LT1006 100* VCC +IN CLK SCK -IN DOUT MISO GND VREF LTC1292 + RPLAT 100 RTD AT 0C CS 1M** 22F TANTALUM * TRW-IRC MAR -6 RESISTOR -0.1% ** 1% METLA FILM RESISTOR RPLAT = ROSEMOUNT 118MFRTD 1292_1. eps Figure 1. 0 to 400C temperature-measurement system 20 Linear Technology Magazine Vol. 2, No. 1, February 1992 DESIGN DESIGN FEATURES IDEAS is given by C/LSB = VREF / ((4096) (1mA) (R1)). The maximum temperature at each input is 125C. Note that if the temperature on the +IN pin is less than the temperature on the -IN pin, the output will be zero. Because the LTC1292 is being driven from a high source impedance, you should limit the CLK frequency to 100kHz or less. fied for the circuit in Figure 2 to account for the inversion introduced by the digital level translators. The software code for interfacing the LTC1292 to the Motorola MC68HC11 or the Intel 8051 is found in the LTC1292 data sheet. The code needs to be modi- 1 Williams, Jim, "Bridge Circuits, Marrying Gain and Balance," Application Note 43, Linear Technology Corp. +15V OUT 1N5229 1k + 1k 1N5229 LT1019-5 CS VCC +INPUT +IN -INPUT -IN DOUT GND VREF GND CLK LTC1292 10V TO 15V 1N4148 DIODES 1F TANTALUM + 47F TANTALUM +5V 1.5k 1k 1.5k 1k 1k 2N2222 P1.4 2N3906 MPU (e.g., 8051) 1k 2N2222 P1.3 1N4148 1.5k P1.1 1k 1292_2. eps Figure 2. Floating, 12-bit data acquisition system +5V +15V LT1027 1F 4.7F TANTALUM LM134 V+ P1.4 V- 228* R1 10k* MPU (e.g., 8051) CS VCC P1.3 CLK +IN LM134 LTC1292 V+ -IN P1.1 DOUT 14.7k* GND V- VREF 22F TANTALUM 10.2k* 22F TANTALUM 228* R1 10k* *1% METAL FILM RESISTOR 1292_3. eps Figure 3. Differential temperature-measurement system Linear Technology Magazine * February 1992 21 DESIGN IDEAS FEATURES DC-Accurate, Programmable-Cutoff, Fifth-Order Butterworth Lowpass Filter Requires No On-Board Clock by Richard Markell The new LTC1063 is a clock-tunable, monolithic filter with low-DC output offset (1mV typical with 5V supplies). The frequency response of the filter closely approximates a fifthorder Butterworth polynomial. Most users choose to tune the filter with an on-board microprocessor and/or timer. This is quite convenient if these components are available. If a clock is not available, the LTC1063 can be tuned with an exter20k +7.5V VIN VOS ADJ 8 20k 2 7 VOUT GND LTC1063 3 - 6 V+ V 7.5V .1F - 3 + 10.000 7 6 LT1007 +7.5V CLK 5 IN 4 CLK OUT 2 0.0 VOUT -10.00 -20.00 4 0.1F AMPLITUDE 1 INPUT -7.5V HC2021 6 10 15k 1% SER CLK C1 SER IN C2 PROG READ VDD PROG 25 PIN PARALLEL PORT CONNECTOR FOR IBM PCs AND COMPATIBLES SD IN GND READ -50.00 -70.00 2 -80.00 3 16 -90.00 1k +7.5 15 CAPACITOR AT MAX VALUE 14 10k 100K 200K CAPACITOR AT CAPACITOR AT 1/2 MAX VALUE MIN VALUE FREQUENCY 74LS14 74LS05 1k 2 11 10 3 4 5 13 12 1 2 3 5 6 9 8 4 1 2 11 18 1063_2. eps 7.5 7.5 74LS14 GND -40.00 1 Figure 2. LTC1063 frequency response 1k The tuning scheme makes use of non-volatile, tunable capacitors available from Hughes Semiconductor. These capacitors allow approximately a decade of tuning range. More range could be obtained by using dual devices. Figure 1 shows the schematic diagram of the application. Be sure to place the variable capacitor as close as possible to the LTC1063 to minimize parasitic elements. Figure 2 shows the frequency response of the filter when the capacitor is varied from minimum to half-value, and then to maximum capacitance. The programming part of the circuit may be disconnected once the variable capacitor is set. The capacitor will remember its value until it is reprogrammed. +5V SD OUT -30.00 -60.00 SER OUT 8 SCLK nal resistor and capacitor. The scheme shown here allows the filter's cutoff frequency to be programmed using an external microprocessor or the parallel port of a personal computer. This allows the cutoff frequency of the filter to be set before the product is shipped. 51 11 8 74LS05 1k 9 6 5 270 25 0.01F +5V GND VDD GND 0.1F GND 0.1F GND PROGRAMMER FOR NON-VOLATILE CAPACITOR, HC2021 NOTES: 1. THE HC2021 SHOULD BE LOCATED CLOSE TO THE LTC1063 FOR BEST RESULTS. 2. +3.5 VDD +18.8. 3. POSITIVE POWER SUPPLY FOR DEVICES 74LS05 AND 74LS14 IS +5V. 4. HUGHES TELEPHONE NUMBER (714) 759-2665. 1063_1. eps Figure 1. Schematic diagram of LTC1063 with programmable cutoff frequency 22 Linear Technology Magazine Vol. 2, No. 1, February 1992 NEW DESIGN DEVICE FEATURES CAMEOS New Device Cameos LT1246: 1MHz Current-Mode PWM Controller Single, 3V Supply Family of 10-Bit and 12-Bit A/D Converters The LT1246 is an improved UC1842architecture device that can operate at switching frequencies up to 1MHz. The improvements are: It eliminates output cross conduction and achieves 5x shorter current-sense delay times (30ns typical), 2x tighter oscillator accuracy, reference tolerance, and drift, and better than 2x faster output rise/ fall times. Start-up current is 4 x lower (<250A). It is equipped with a current-sense blanking circuit that eliminates erratic operation and it also has active PWM output pulldown in under-voltage lockout. The 1MHz switching frequency allows the use of very small inductors and capacitors. LTC leads the pack in 3V-supply A/D converters with three new products-- the LTC1283 and 1289 10-bit and 12-bit serial-output A/Ds with 8-channel input MUX and sampleand-hold; and the LTC1287, a 12-bit, serial-output A/D with a differential input. All three devices are guaranteed to operate on supply voltages as low as 2.7 volts. LT1117 Adjustable, 800mA, LowDropout Regulator The LT1117 adjustable, low-dropout regulator provides up to 800mA output current with a 1.0V (typical) dropout voltage in a compact surfacemount SOT-223 package. The LT1117 (adjustable) provides the most output current of any surface-mountable, low-dropout regulator. Unlike PNP lowdropout regulators, where up to 10% of the output current flows to ground as quiescent current, the LT1117 quiescent current flows to the load, raising efficiency. Dropout voltage is a function of load current and is guaranteed to be 1.2V maximum at 800mA load current. Dropout voltage decreases with lower output currents. The LT1117 reference is trimmed to 1%. The LT1117 has output-current limiting to minimize stress during overload conditions. Fixed 2.85 and 5V versions are available for SCSI-2 and other applications. Linear Technology Magazine * February 1992 The LTC1289 and LTC1283 allow the input MUX to be software configured for either single-ended or differential inputs (or combinations of both). An on-chip sample-and-hold is provided for all single-ended input channels. The LTC1289 can be put into a power shutdown state in which it consumes only 5A of supply current. All three devices feature a three- or four-wire serial interface that communicates directly to most controllers and microprocessors. LT1200: High-Speed Op Amp with Low Power Consumption The LT1200 is a unity-gain-stable op amp which combines low-power operation with high speed and excellent DC characteristics. Its 50V/s slew rate, 11MHz gain-bandwidth product, 430nA settling time (to 0.1%), and 1mA supply current make the LT1200 an ideal choice for applications where power is at a premium. Excellent DC specifications (1mV maximum VOS, 100nA maximum IOS) and high gain (6 V/mV) combined with the fast settling, enable the LT1200 to be used for fast data acquisition systems. The output can drive a 2k load to 12 volts with a 15 volt supply and can drive 500 to 3 volts on 5 volt supplies. The circuit is stable with all capacitive loads, a property which makes it useful as a buffer or in cable- by LTC Marketing driving applications. This driving capability is achieved using a technique which senses the load induced output pole and adds compensation at the amplifier gain node. LT1217: Low Power, 10MHz Current-Feedback Amplifier The LT1217 offers high speed along with excellent DC accuracy. The 10MHz bandwidth, 500V/s slew rate, and fast settling time of only 280ns (to 0.1%) is complemented by a DC offset voltage of only 1mV. Manufactured on Linear Technology's proprietary complementary-bipolar process, the LT1217 draws only 1mA of quiescent current. The LT1217 also features a shutdown mode that reduces supply current to 350A. The LT1217 has a high gain- bandwidth product at high gains. The bandwidth is over 1MHz at a gain of 100. With a 50mA guaranteed minimum output current, the LT1217 is excellent for driving cables or other low-impedance loads. The LT1217 operates on supplies from 5V to 15V and can drive a 2k load to 13V with 15V supplies. LT1217 applications include highspeed buffers, wide-band amplifiers, multi-stage active filters, high-speed data acquisition systems, and video amplifiers. The LT1217 comes in the industry-standard pinout and can upgrade the performance of many older products. For further information on the above or any other devices mentioned in this issue of Linear Technology, use the reader service card or call the LTC literature service number: (800) 6375545. Ask for the pertinent data sheets and application notes. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the circuits described herein will not infringe on existing patent rights. 23 DESIGN FEATURES DESIGN TOOLS World Headquarters Applications on Disk Linear Technology Corporation 1630 McCarthy Boulevard Milpitas, CA 95035-7487 Phone: (408) 432-1900 FAX: (408) 434-0507 NOISE DISK This IBM-PC (or compatible) progam allows the user to calculate circuit noise using LTC op amps, determine the best LTC op amp for a low noise application, display the noise data for LTC op amps, calculate resistor noise, and calculate noise using specs for any op amp. SPICE MACROMODEL DISK This IBM-PC (or compatible) high density diskette contains the library of LTC op amp SPICE macromodels. The models can be used with any version of SPICE for general analog circuit simulations. The diskette also contains working circuit examples using the models, and a demonstration copy of PSPICETM by MicroSim. FILTERCAD DISK FilterCAD is a menu-driven filter design aid program which runs on IBM-PCs (or compatibles). This collection of design tools will assist in the selection, design, and implementation of the right switched capacitor filter circuit for the application at hand. Standard classical filter responses (Butterworth, Cauer, Chebyshev, etc.) are available, along with a CUSTOM mode for more esoteric filter responses. SAVE and LOAD utilities are used to allow quick performance comparisons of competing design solutions. GRAPH mode, with a ZOOM function, shows overall or fine detail filter response. Optimization routines adapt filter designs for best noise performances or lowest distortion. A design time clock even helps keep track of on-line hours. Technical Books Linear Databook -- This 1,600 page collection of data sheets covers op amps, voltage regulators, references, comparators, filters, PWMs, data conversion and interface products (bipolar and CMOS), in both commercial and military grades. The catalog features well over 300 devices. $10.00 Linear Applications Handbook -- 928 pages chock full of application ideas covered in-depth through 40 Application Notes and 33 Design Notes. This catalog covers a broad range of "real world" linear circuitry. In addition to detailed, systems-oriented circuits, this handbook contains broad tutorial content together with liberal use of schematics and scope photography. A special feature in this edition includes a 22-page section on SPICE macromodels. $20.00 Monolithic Filter Handbook -- This 232 page book comes with a disk which runs on PCs. Together, the book and disk assist in the selection, design and implementation of the right switched capacitor filter circuit. The disk contains standard filter responses as well as a custom mode. The handbook contains over 20 data sheets, Design Notes and Application Notes. $40.00 U.S. Area Sales Offices CENTRAL REGION Linear Technology Corporation Chesapeake Square 229 Mitchell Court, Suite A-25 Addison, IL 60101 Phone: (708) 620-6910 FAX: (708) 620-6977 NORTHEAST REGION Linear Technology Corporation One Oxford Valley 2300 E. Lincoln Hwy., Suite 306 Langhorne, PA 19047 Phone: (215) 757-8578 FAX: (215) 757-5631 NORTHWEST REGION Linear Technology Corporation 782 Sycamore Dr. Milpitas, CA 95035 Phone: (408) 428-2050 FAX: (408) 432-6331 SOUTHEAST REGION Linear Technology Corporation 17060 Dallas Parkway Suite 208 Dallas, TX 75248 Phone: (214) 733-3071 FAX: (214) 380-5138 SOUTHWEST REGION Linear Technology Corporation 22141 Ventura Boulevard Suite 206 Woodland Hills, CA 91364 Phone: (818) 703-0835 FAX: (818) 703-0517 International Sales Offices FRANCE Linear Technology S.A.R.L. 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The Coliseum, Riverside Way Camberley, Surrey GU15 3YL United Kingdom Phone: 011-44-276-677676 FAX: 011-44-276-64851 LINEAR TECHNOLOGY CORPORATION 1630 McCarthy Boulevard Milpitas, CA 95035-7487 (800) 637-5545 (c)24 1992 Linear Technology Corporation/ Printed in U.S.A./30K Linear Technology Magazine Vol. 2, No. 1, February 1992